74HC154 : 4- to 16-Line Decoder/Demultiplexer

4- to 16-Line Decoder/Demultiplexer
Availability: 6 in stock
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Delivery date: 3-5 days
$0.45

4-to-6 Line Decoder DIP-24

The MM74HC154 decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications. It possesses high noise immunity, and low power consumption of CMOS with speeds like low power Schottky TTL circuits.

Features

  • Typical propagation delay: 21 ns
  • Power supply quiescent current: 80 µA
  • Wide power supply voltage range: 2 to 6V
  • Low input current: 1 µA maximum
  • Package: DIP-24 (0.6" wide)
Description
  • The 74HC154 74HCT154 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The 74HC154 74HCT154 decoders accept four active HIGH binary address inputs and provide 16 mutually-exclusive active LOWoutputs. The two-input enable Gate CAN be used to strobe the decoder to eliminate the normal decoding 'glitches' on the outputs, or CAN be used for the expansion of the decoder. The enable Gate has two ANDed inputs which must be LOW to enable the outputs. The 74HC154 74HCT154 CAN be used as a 1-to-16 demultiplexer by using one of the enable inputs as the multiplexed data input. When the other enable input is LOW, the addressed output will follow the state of the applied data.

  • The ’HC154 and ’HCT154 are 4- to 16-line decoders/demultiplexers with two enable inputs, E1 and E2.

  • A High on either enable input forces the output into the High state. The demultiplexing function is performed by using the four input lines, A0 to A3, to select the output lines Y0 to Y15, and using one enable as the data input while holding the other enable low.

Products specifications
Attribute nameAttribute value
CPU TypeGoogle